Transcript Document

Module studies at IC
OUTLINE
laboratory setup description, APV I2C settings
pulse shape studies (dependence on ISHA, VFS)
results with b source (effect of varying det. bias)
noise performance (PA resistance contribution)
on-chip CM subtraction explanation for unbonded channel behaviour
conclusions
emphasis on verifying APV performance and understanding any unexpected behaviour
DCU not studied (yet)
Mark Raymond
([email protected])
October, 2001
CMS Tracker Electronics
1
Laboratory test setup
module/UTRI setup adapted
to in-house DAQ
allows use of extensive LabView
software, previously used to
evaluate individual APV
performance
TDC incorporated for use with beta source
to record interaction time w.r.t. APV sampling
clock edge
October, 2001
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APV bias settings
register
value (decimal)
IPRE
98
IPCASC
52
IPSF
34
ISHA
80
ISSF
34
IPSP
55
IMUXIN
34
VFP
30
VFS
60
VPSP
~50
October, 2001
Values used according to most recent user
manual V.2.2 (www.te.rl.ac.uk/med)
*note ISHA value larger than “rough” guide
range in manual
*
operation at different temperatures will affect
choice of values here – module not mounted
on heat sink so hybrid running warm
T gm and analogue stages speed up
 ISHA
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Pulse shape dependence
on VFS
120
ADC units
100
Pulse shape controlled by ISHA
and VFS
60
40
VFS=0
0
100
ISHA=80,VFS=60
80
ADC units
For fixed ISHA, Peak mode fall time
and amplitude strongly dependent on
VFS
VFS=120
80
20
other bias parameters will affect shape
(eg IPRE) but may end up with
unreasonable power consumption
Deconvolution mode less sensitive,
only some over/undershoot
ideal CR-RC
ISHA=80,VFS=60
60
40
VFS=120
20
0
-20
VFS=0
0
20
40
60
80
100
3.125 ns steps
October, 2001
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Pulse shape dependence
on ISHA
ideal CR-RC
ISHA=80,VFS=60
ISHA=100
100
ADC units
For fixed VFS, Peak mode pulse
shape only weakly dependent on
ISHA
120
80
ISHA=30
60
40
20
But Deconvolution mode amplitude
quite sensitive to peak mode rise time
(and consequently ISHA)
0
120
ISHA=80,VFS=60
Remainder of results here use
ISHA=80, VFS=60
ADC units
100
ISHA=100
80
ISHA=30
60
40
20
0
0
20
40
60
80
100
3.125 ns steps
October, 2001
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Effect of detector bias voltage on pulse shape (in deconvolution)
50 ns
200
50 ns
150
100
HT=250 V
50 ns
150
100
50
50
0
0
0
50 ns
HT=100 V
ADC counts
ADC counts
200
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
TDC steps [ns]
TDC steps [ns]
plot single strip samples vs. TDC value for all scintillator triggers
-> pulse shape for real detector signals (internal cal. gives impulse response only)
effective signal pulse shape depends on detector bias
longer charge collection time results in reduced signal amplitude and broader pulse width
more significant when operating in deconvolution mode
October, 2001
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Effect of detector bias voltage on signal
1000
Deconvolution Mode
250V
200V
150V
100V
counts
800
600
Beta pulse height
spectrum acquired
in deconvolution mode
detector depleted at ~ 100V
100-150 V over-voltage
required for max S/N
400
200
0
0
October, 2001
20
40
60
ADC units
80
100
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120
7
Sr-90 beta pulse height spectra
1000
DECONVOLUTION
PEAK MODE
counts
800
600
400
200
0
0
50
100
ADC units
150
0
50
100
ADC units
150
single strip spectrum acquired in Peak (Deconvolution) mode
detector bias = 250 V
rms noise 2.2 (3.2) ADC units -> 930 (1500) electrons
hit included if > 6 (9) and neighbouring channels < 6 (9)
TDC cut 10 (5) ns window
S/N ~ 27 (16.5)
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Noise performance
10
peak
deconvolution
rms ADC units
8
peak
deconvolution
6
4
2
0
0
20
40
60
80
100
120 0
20
APV0 channel number
40
60
80
100
120
APV1 channel number
above pictures show raw noise – no software CM algorithm applied
some across chip variation – PA contribution (next slide)
shorted channels and shorted detector capacitors -> lower noise as expected (preamp O/Ps saturated)
unbonded channels show high noise (see later)
higher noise for channels at detector edge (see later)
October, 2001
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Noise performance – calculations of pitch adapter contribution
Cf
O/P noise due to preamp I/P FET
RPA
VFET*(CFET+CDET)/Cf
O/P noise due to PA resistance
vPA
CDET
VPA*CDET/Cf
vFET
CFET
~ 20pF
pitch adapter shortest – longest strips
room temp. noise spectral density
relative noise contribution at preamp O/P
% increase
RPA
VPA
0
0
35
0
preamp
~ 1.4 nV/
Hz
~ 5pF
24
0.63
37.2
6.3%
60
1.0
40.3
15%
[ohms]
[nV/ Hz]
so expect to see ~ 8 % difference (37.2 -> 40.3) between chans bonded to shortest and longest PA strips
October, 2001
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Noise performance – PA
contribution
5.0
4.5
8%
4.0
 expect to see slope across chip
effect just about visible, but 8% effect
not dramatic anyway
3.5
rms ADC units
APV0 PA geometry -> longest line for ch0
shortest for ch127
3.0
8%
2.5
2.0
1.5
peak
deconvolution
peak, no PA resistance
decon, no PA resistance
1.0
0.5
0.0
0
20
40
60
80
100
120
APV0 channel number
APV0
October, 2001
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On-chip CM subtraction
V250
preamp
R (external)
V250
vCM
V125
vIN+vCM
this node common to all 128 inverters
in chip (other 127 have CM only)
vOUT = -vIN
VSS
Occurs because of external resistor
supplying power to preamp output
inverter stage (introduced for stability
after 1st prototype hybrid tests)
CM signal appears on external
resistor – NOT on internal
inverter output nodes
October, 2001
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V250
On-chip CM
subtraction
R (external)
1 channel with
signal + CM
vR
127 channels with CM only
vIN+vCM
vCM
vOUT
vCM
vCM
vR
127*gm(vCM-vR)
gm(vIN+vCM-vR)
small signal model
gm(-vOUT)
sum currents into node vR:
vOUT
R
vR
R = gm(vIN+vCM-vR) + 127*gm(vCM-vR)
vR = (vIN +128 vCM) gm R  (vIN +128 vCM) gm R = vIN + vCM  vCM
128
1+128 gm R
128 gm R
currents down left hand branch:
but if vR = vCM, then:
October, 2001
gm(-vOUT) = gm(vIN+vCM-vR)
vOUT = -vIN
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On-chip CM subtraction – can see effect using internal calibrate
100
100
16
0
0
-100
-100
100
80
100
32
no. of cal
lines fired
0
-100
96
0
-100
100
100
48
0
0
-100
-100
100
0
-100
112
100
64
cal signal in every
channel -> flatline
=> CM rejection
128
0
-100
0
October, 2001
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50
100
14
Implications of on-chip CM subtraction
detector bias line noise suppressed, but only for bonded channels
=> unbonded channels show “noise” after on-chip CM subtraction (not actually noise but CM signal itself)
=> should be correlation between unbonded channels
can verify by doing scatter plot of pedestal samples from one channel vs. another for many triggers
(i.e. look for correlations in the noise)
30
20
10
0
-10
-20
-30
-30-20-10 0 10 20 30
channel 98
edge channel vs. unbonded channel
channel 0
30
20
10
0
-10
-20
-30
-30-20-10 0 10 20 30
channel 61
2 unbonded channels
channel 94
channel 60
2 normal channels
30
20
10
0
-10
-20
-30
-30-20-10 0 10 20 30
channel 94
CM effects also explain edge channel noise since edge channels see less CM
signal (nothing coupling in from neighbour strips on one side)
=> anti-correlation between edge channel and unbonded channel
October, 2001
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Strange behaviour of APV4 on this module
Volts
1.2
digital header
amplitude for
APVs 1 & 2
0.8
dig. head. dig. head.
amp. APV3 amp. APV4
0.4
0.0
-0.4 -0.2
0.0
0.2
0.4
0.6
0.8
-6
1.2x10 -0.4 -0.2
time
0.0
0.2
0.4
0.6
0.8
-6
1.2x10
time
~ 30 % amplitude reduction of digital header for APV4
similar reduction for signal amplitude
not consistent with wafer test results for the respective chips
no obvious explanation (bonding looks ok)
October, 2001
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Conclusions
1st opportunity for us (at IC) to examine APV performance with full size CMS detectors
no nasty surprises, module performance (pulse shape, noise) appears good
consistent with predictions from individual chip measurements
and consistent with detectors produced by others
unbonded channels behaviour understood in terms of on-chip CM subtraction
note: on-chip subtraction only takes care of CM occurring in or previous
to preamp
October, 2001
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