Transcript apsexp1.ppt

Active Pixel Sensor Circuit
• Simple version: 3
transistors (pixel
reset, source follower,
access),
one
photodiode
• Not shown: Row
read circuitry, a
timed buffer
connected to v_out
and activated a set
time after pixel
access
Active Pixel Sensor Circuit
• Operation:
– Reset transistor
gate pulsed,
photodiode
junction cap.
charged up, source
follower output
follows
– Photocurrent starts
discharging, SF
output follows
– Access transistor
gate pulsed, output
cap.charged up
– Bias current
discharges output
voltage linearly
until the set read
time for v_out
Active Pixel Sensor Circuit
• Can model photodiode with junction cap. and
ideal current source in parallel
Active Pixel Sensor Circuit
• Design issues:
– Transistor sizes
should be as small as
possible for the
maximum
photodiode/pixel
ratio (“fill factor”)
– Transistor sizes
should be chosen
carefully for enough
current, SF gain, and
isolation of SF output
from the pixel output
– Higher bias current:
readout needs to be
a smaller time after
access is pulsed;
timing gets tighter,
reset period can be
set smaller
– Larger reset period:
Better resolution,
tighter readout
timing required