Transcript Document 7657087

DEPFET Technology for future colliders
Carlos Mariñas
IFIC-Valencia (Spain)
LCPS09, Ambleside
1
Carlos Mariñas, IFIC, CSIC-UVEG
• DEPFET (DEpleted P-channel Field Effect Transistor): Technology invented by J.
Kemmer & G. Lutz, 1987
 J. Kemmer and G. Lutz: ''New semiconductor detector concepts'', Nucl. Instr. &
Meth. A 253 (1987) 365-377
• Several different applications for Astrophysics and Particle Physics:
 XEUS: Future european X-ray observatory to investigate the Early Evolution Stages
of the Universe (early black holes, evolution of galaxies…)
 BepiColombo: ESA project to Mercury to investigate the origin and evolution of the
planet
 X-FEL
 ILC
 BELLE-II → Technology chosen for the new Vertex Detector
LCPS09, Ambleside
2
Carlos Mariñas, IFIC, CSIC-UVEG
Why this technology?
 Vertexing
in future colliders
requires
excellent
vertex
reconstruction and efficient heavy
quark flavour tagging
 This requirements impose
constraints on the detector:
unprecedented
• High granularity to cope with the high density of tracks
in the jets and the background
• High spatial resolution per layer <4mm (pixel size of
25x25mm2)
See Prof. Ch. Damerell’s talk
• Fast read-out
• Low material budget: <0.1%X0/layer (~100mm of Si)
• Low power consumption
DEPFET
 Measurements made on realistic DEPFET
prototypes have demonstrated that the concept
is one of the principal candidates to meet these
challenging requirements
LCPS09, Ambleside
3
Carlos Mariñas, IFIC, CSIC-UVEG
The DEPFET principle
 Each pixel is a p-channel FET on a
completely depleted bulk (sideward
depletion). Charge is collected by drift
 A deep n-implant creates a potential
minimum for electrons under the gate
(internal gate)
 Signal electrons accumulate in the
internal gate and modulate the
transistor current (gq≈500pA/e-)
 Accumulated charge can be removed
by a clear contact
 Low power consumption: Readout on
demand (Sensitive all the time, even in
OFF state)
LCPS09, Ambleside
o Small pixel size ~25μm
GOAL
 Internal amplification
4
o r/o per row ~50ns (20MHz)
(drain)Fully depleted bulk
o Noise≈100e-Small capacitance and first
in-pixel amplification
o Thin Detectors≈50μm
Carlos Mariñas, IFIC, CSIC-UVEG
DEPFET-Principle of Operation
Potential distribution:
MIP
source top gate drain
n+
p+
p
bulk
n+
internal Gate
n+
Backcontact
symmetry axis
n
- - -- - - internal gate
Drain
50 µm
p+
~1µm
clear
+
-
+
-
+
Source
n-
+
-
p+
rear contact
[TeSCA-Simulation]
FET-Transistor integrated in every pixel (first amplification)
Electrons are collected in „internal gate“ and modulate the transistor-current
Signal charge removed via clear contact
LCPS09, Ambleside
5
Carlos Mariñas, IFIC, CSIC-UVEG
DEPFET-Principle of Operation
+20V
Potential distribution:
source top gate drain
symmetry axis
n+
p
p+
clear
0V
n+
bulk
internal Gate
n+
Backcontact
n
- - -- - - internal gate
Drain
50 µm
p+
~1µm
0V
Source
n-
p+
rear contact
[TeSCA-Simulation]
FET-Transistor integrated in every pixel (first amplification)
Electrons are collected in „internal gate“ and modulate the transistor-current
Signal charge removed via clear contact
LCPS09, Ambleside
Carlos Mariñas, IFIC, CSIC-UVEG
ILC prototype system
•Hybrid Board
• DEPFET 64x256 matrix
• Readout chip (CURO)
• Steering chips (Switchers)
•Protection Board
• Regulators
•Readout Board
• 16 bit ADCsDigitization
• XILINX FPGAChip
config. and
synchronization during DAQ
• 128 kB RAMData storage
• USB 2.0 boardPC comm.
LCPS09, Ambleside
6
Carlos Mariñas, IFIC, CSIC-UVEG
Hybrid board
• DEPFET Matrix
• 64x128 pixels
• CURO:
• Several pixel sizes,
implants, geometries
• 128 channels
• CUrrent Read Out
• Switchers:
• Subtraction of Iped
from Iped+Isig
• Steering chips
• Gate: Select row
• Clear: Clear signal
LCPS09, Ambleside
7
Carlos Mariñas, IFIC, CSIC-UVEG
Operation mode: Row wise readout
Clear
gateSW
DEPFET-matrix
DEPFET- matrix
Gate
SW
reset
off
off
on
reset
off
off
Row wise r/o (Rolling Shutter)

Select row with external gate, read
current, clear DEPFET, read current
again  The difference is the signal

Low power consumption: Only one
row active at a time; Readout on
demand (Sensitive all the time, even
in OFF state)

Two different auxiliary chips needed
(Switchers)

Limited frame rate
nxm
pixel
off
off
VGATE, ON
VGATE, OFF
IDRAIN
drain
Drain
VCLEAR, ON
VCLEAR, OFF
VCLEAR-Control
0 suppression
output
Enable row – Read current (Isig + Iped)
– Clear – Read current (Iped), Subtract
– Move to next row
LCPS09, Ambleside
8
Carlos Mariñas, IFIC, CSIC-UVEG
DEPFET Concept for a half ILC module
LCPS09, Ambleside
9

10 and 25 cm long ladders read out at the ends

24 micron pixel

design goal 0.1% X0 per layer in the sensitive
region
Carlos Mariñas, IFIC, CSIC-UVEG
Thinning : mechanical samples
6” wafer with diodes and large mechanical samples
Thinned area: 10cm x 1.2 cm (ILC vertex detector dummy)
Possibility to structure handling frame
(reduce material, keep stiffness)
LCPS09, Ambleside
10
Carlos Mariñas, IFIC, CSIC-UVEG
DEPFET achievements: Test Beam Setup
x
z
y
BEAM
120 GeV ∏
Telescope:
• 5 DEPFET planes
• 32x24μm2
DUT:
• CCG
• 1 DEPFET modules
Scintillators:
• 450 μm thick
• Various pixel sizes
• 1 Big “Beam finder”
• 450 μm thick
• 1 Finger “Beam
allignment”
Trigger Synchronization
via TLU (Trigger Logic Unit)
LCPS09, Ambleside
• Triggering
11
Carlos Mariñas, IFIC, CSIC-UVEG
Test Beam Setup
• General view
• 6 Modules at once
• 1 rotating module
LCPS09, Ambleside
12
Carlos Mariñas, IFIC, CSIC-UVEG
My work
 Calibration/optimization of different generations of matrices:
• PXD4-Clocked Cleargate. 128x64 pixels
• PXD5-Common Cleargate. 128x64 pixels
• PXD5-Capacitative Coupled Cleargate. 256x64 pixels
LCPS09, Ambleside
13
Carlos Mariñas, IFIC, CSIC-UVEG
 Test Beam
• Data analysis (SNR, Residuals, Charge collection uniformity)
3x3
cluster
signal
ResY=1.34μm
σ≈4%
LCPS09, Ambleside
14
Carlos Mariñas, IFIC, CSIC-UVEG
 Mechanical/Thermal measurements and simulation (Finite Element An.)
• Natural frequencies, self weigth bowing, deformations
• Conduction, convection, thermal stress
• Power cycling
• Thermal characterization of different materials for cooling (Al, Cu, TPG)
°C
40
35
30
25
2:59:25 3:00:05
29/03/2000
3:00:45
3:01:25
3:02:05
3:02:45
3:03:25
3:04:05
3:04:45
3:05:25
3:06:05
3:06:45
Natural convection
LCPS09, Ambleside
15
Carlos Mariñas, IFIC, CSIC-UVEG
Belle-II, SuperB, ILC, CLIC…
The LHC is not the end… but just the
beginning!
Thank you very much!
LCPS09, Ambleside
16
Carlos Mariñas, IFIC, CSIC-UVEG