Transcript Document 7283387

Channel Coding
NCU-EE VLSI/DSP Lab.
Freshman Training Course
Speaker : 林承鴻
Advisor: 蔡宗漢 博士
National Central University
Department of Electrical Engineering
VLSI/DSP Lab.
2003/07/07
1
Outline

Overview of Channel coding
– Digital Communication System
– Types of Error Control
– Types of Channel Coding

Turbo Codes
–
–
–
–
–

Introduction
System model
Log-MAP vs SOVA
Simulation
SW – Memory Architectures
Conclusions
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Department of Electrical Engineering
VLSI/DSP Lab.
2003/07/07
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Digital Communication System
Information
Source
JPEG,
MPEG, etc.
Source
Encoder
rb
RS code,
Turbo code,
Channel
Encoder
rc
QPSK, QAM,
BPSK, etc.
Modulator
rs
Channel
Data Sink
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Source
Decoder
2003/07/07
Channel
Decoder
Demodulator
3
Channel Coding




Channel coding refers to the class of signal transformation
designed to improve communication performance by
enabling the transmitted signals to better withstand the
effects of various channel impairments.
Channel coding can be partitioned into two areas,
waveform (or signal design) coding and structured
sequences (or structured redundancy.)
Waveform coding deals with transforming waveforms into
“better waveforms,” to make the detection process less
subject to errors.
Structured sequence deals with transforming data
sequences into “better sequences,” having structured
redundancy.
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Types of Error Control

Before we discuss the detail of structured redundancy, let
us describe the two basic ways such redundancy is used for
controlling errors.
– Error detection and retransmission, utilizes parity bits
(redundant bits added to data) to detect that an error has
been made and requires two-way link for dialogue
between the transmitter and receiver.
– Forward error correction (FEC), requires a one way link
only, since in this case the parity bit are designed for
both the detection and correction of errors.
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Why Use Error-Correction Coding


Trade-off:
– Error Performance verse Bandwidth
– Power verse Bandwidth
– Data Rate verse Bandwidth
– Capacity verse Bandwidth
– Coded verse Uncoded Performance
Coding Gains
– For a given bit-error probabilities, coding gain is
defined as the reduction in Eb/N0 that can be realized
through the use of code.
G (dB )  (
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Eb
E
) u (dB)  ( b ) c (dB)
N0
N0
2003/07/07
6
Types of Channel Coding

Block codes
– Extended Golay code
– Hamming code
– BCH code

Convolutional codes
– Recursive or Nonrecursive
– Systematic or Nonsystematic



Reed-Solomon Codes
Interleaving and Concatenated Codes
Turbo Codes
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Block Codes

(n,k) Block Codes
– message :
k-tuple u=(u1,u2,…,uk)
– code word :
n-tuple v=(v1,v2,…,vn)
– code rate :
R=k/n
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(6,3) Binary Block Code
Messages Code words
(0 0 0)
(0 0 0 0 0 0)
(1 0 0)
(1 1 0 1 0 0)
(0 1 0)
(0 1 1 0 1 0)
(1 1 0)
(1 0 1 1 1 0)
(0 0 1)
(1 1 1 0 0 1)
(1 0 1)
(0 0 1 1 0 1)
(0 1 1)
(1 0 0 0 1 1)
(1 1 1)
(0 1 0 1 1 1)
8
Convolustional Codes

(n,k,m) Convolutional Codes
– message :
k-tuple u=(u1,u2,…,uk)
– code word :
n-tuple v=(v1,v2,…,vn)
– code rate :
R=k/n
– memory order :
m
– Constraint length :
K=m+1
– Generator polynomials :
g1(x)= 1+x+x2;
g2(x)=1+x2
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(2,1,2) Convolutional Code
u2
Input bit
b
s2
s1
D
D
u1
9
Outline

Overview of Channel coding
– Digital Communication System
– Types of Error Control
– Types of Channel Coding

Turbo Codes
–
–
–
–
–

Introduction
System model
Log-MAP vs SOVA
Simulation
SW – Memory Architectures
Conclusions
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Department of Electrical Engineering
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10
Turbo Codes

Shannon’s channel coding theorem guarantees the existence of codes
that can achieve arbitrary small probability of error if the data
transmission rate is smaller than the channel capacity.
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Applications

Turbo code is currently adopted as the channel coding
schemes in many next-generation communication systems
– WCDMA, CDMA2000
– CCSDS in space communications
– Baseband Signal compensation in Fiber transmission systems
Application Area
Space Data
Transmission
Cellular mobile
Applied System
Consultative Committee for Space Data
Systems (CCSDS)
(a) 3rd Generation Partnership Project
(3GPP)
(b) CDMA2000
Satellite
Communication
INMARSAT
Network
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Specifications in WCDMA
Type of TrCH
Coding scheme
BCH
PCH
Coding rate
1/2
Convolutional coding
RACH
1/3, 1/2
CPCH, DCH, DSCH, FACH
Turbo coding
1/3
No coding
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Specification in CDMA2000
Channel Type
Forward Error
Correction code
Code Rate
Access Channel
Convolutional
1/3
Enhanced Access Channel
Convolutional
1/4
Reverse Common Control Channel
Convolutional
1/4
Reverse Dedicated Control Channel
Convolutional
1/4
Reverse Fundamental Channel
Convolutional
1/2, 1/3, 1/4
Convolutional or
Turbo code
1/2, 1/3
1/2, 1/3, 1/4
Reverse Supplemental Code Channel
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Turbo Code v.s. Convolutional
Code
Convolutional Code



Turbo Code
Non-recursive
Non-systematic
Without Interleaver




NSC
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Recursive
Systematic
Parallel structure
Use Interleaver
RSC
15
Design Flow
Design
Specification
High Level
Simulation
Design
Architecture
Place & Route
Behavior Level
Simulation
Dracula
DRC, LVS, LPE
Synthesis & Gate
Simulation
Post-Layout
Simulation
Tap out
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System Model
k
d
k
X
Memoryless Noise
Parallel-to-serial
Y
k1
Interleaver
Y
k2
RSC1
Puncturing
RSC1
x
BPSK
Modulator
n

r
Denterlever
Serial-to-parallel
BPSK
Demodulator
1e
ro
r1
Decoder 1
Decoder 2
r2
2
~
Interlever
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 2e
Interlever
ro
Hard
Decision
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dk
Denterlever
17
Log-MAP vs SOVA
G=[7 5], Unpunctured(1/3),
frame size=1024,
Iteration=8.
Iteration
increment..
SOVA
Iteration
increment..
Log_MAP
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The SOVA algorithm
Input
symbols
‧‧‧
‧‧‧
Trace back
Store
sign
Delay Line
‧‧‧
weight
ML path
Competitor path
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Log-MAP Algorithms

1 e s s
Lin ( xk ) xk  Lc yks xks  Lc ykp xkp
2
 k ( S )  log  k ( S ) 
 k ( S )  log
 k ( S )  log
M s 1

 (e rk i ( Sk1 ,S ) k1 ( Sk1 ) )
 k ( S )  MAX * (rk i ( S k 1 , S )   k 1 ( S k 1 ))
S k 1 ,i
S k 1  0 i0 ,1
M s 1
  (e
rk 1i ( S , S k 1 )   k 1 ( S k )
 k ( S )  MAX * (rk 1i ( S , S k 1 )   k 1 ( S k ))
)
S k 1 ,i
S k 1  0 i0 ,1
LLRk ( S )  log
 log
M s 1
 (e
k
( S k )  rk 11( S , S k 1 )   k 1 ( S k )
)
S k 0
M s 1

LLRk ( S )  MAX * ( k ( S k )  rk 11( S , S k 1 )   k 1 ( S k ))
Sk
 (e
 k ( S k )  rk 1 0 ( S , S k 1 )   k 1 ( S k )
 MAX * ( k ( S k )  rk 1 0( S , S k 1 )   k 1 ( S k ))
)
Sk
S k 0
MAX * ( x, y)  ln( e x  e y )  MAX ( x, y)  ln( 1  e ( x  y ) )
|x-y|
ln(1+e-|x-y|)
0~0.25
0.25~0.5
0.5~0.75
0.75~1
1~1.25
1.25~1.5
1.5~2
>2
0.75
0.5
0.5
0.5
0.25
0.25
0.25
0
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Log-MAP Algorithms
S0
S0
t0
t
 k (1,0)
S1
S1
t
 k 1 (0) 1  k (0,0)  k (20)  k 1 (0,0)
 k 1 (1)
t3 
k 1
(0)
t4
t5
 k (0)
 k 1 (0,2)
 k 1 (2)
S2
S2
S3
S3
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Sliding Window – Memory Issue


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The extrinsic and APP
value are made with a
delay, which is equal
to received sequence
length.
But the decoder
decisions length can be
reduced to about six
times the encoder
memory because of
reliable decoding
decision.
22
Simulation Results (1/3)
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Simulation Results (2/3)
Iteration 8
1
2
3
4
5
6
7
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Simulation Results (3/3)
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SW - Memory Architectures


Advantage:
1 Less memory size. 2. Might be Lower latency.
Disadvantage:
1.Read-modify-write access required for the memory.
2.Address is hard to be controlled.
RAM A
MUX
RAM3
MUX
RAM2
MUX
MUX
MUX
ACS
β
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MUX
MUX
ACS
β
ACS
α
ACS u
 k (u; O)
RAM1
ACS c
 k (c; O)
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Timing Diagram
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Position VS Time
A
B0
DO
B1
G
Decode output without LIFO
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Decode output with LIFO
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ACS Unit
*Add-compare-select (ACS) Unit:
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Forward / Backward Processor
Trellis States:
S0
S0
S1
S1
S2
S2
S3
S3
Forward Processor (A) / Backward Processor (B) Block Diagram:
Block Diagram based on Trellis States:
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Novel Turbo Code – Iteration
Issues
In high-quality channel environments, a large of decoding
iterations are not required to obtain the target BER, and it
is possible to terminate the process after a few numbers of
decoding iterations.
L (d )

e2
k
Denterlever
xk


y1k 

SISO
(MAP1)
Decoder

xk  La 2 (d k )
La1 ( d k )


Interlever
SISO
(MAP2)
Decoder
xk  Le1 (d k )
y2 k

xk  La 2 (d k )

Threshold Detection
Hard
Decision
L1 (d k )
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Denterlever
L2 (d k )
dk
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Outline

Overview of Channel coding
– Digital Communication System
– Types of Error Control
– Types of Channel Coding

Turbo Codes
–
–
–
–
–

Introduction
System model
Log-MAP vs SOVA
Simulation
SW – Memory Architectures
Conclusions
National Central University
Department of Electrical Engineering
VLSI/DSP Lab.
2003/07/07
32
Conclusions




We discuss some fundamentals of channel coding.
We discuss some basic implementation issues for
turbo codes.
This study can be exploited in development of
high performance receiver with different
constraints of cost and throughput.
The novel turbo decoder can practically have
lower iteration with the adaptive SNR channel
estimation.
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Department of Electrical Engineering
VLSI/DSP Lab.
2003/07/07
33