Multi Level Logic Synthesis (Part II)`` (PPT Slides)
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Transcript Multi Level Logic Synthesis (Part II)`` (PPT Slides)
ENGG3190
Logic Synthesis
“Multi Level Logic”
(Part II)
Winter 2014
S. Areibi
School of Engineering
University of Guelph
Outline
• Implicit Don’t Cares
• How they arise due to structure
• Types and flavors of Don’t Cares
– Satisfiability Don’t Cares
– Controllability Don’t Cares
– Observability Don’t Cares
• Summary
2
Logic Optimization methods
Logic Optimization
Two-level logic (PLA)
Exact (QM)
Multi-level logic
(standard cells)
Heuristic
(espresso)
Boolean
Structural
(SIS)
Functional
(AC, Kurtis)
algebraic
3
Functional
(BDD-based)
Boolean
MLS: Implicit Don’t Cares
Don’t cares in basic logic design.
1,0 x (allow more flexibility)
MLLS don’t care arise naturally and implicitly.
Don’t cares Rich source of optimization
Using the Algebraic model we lose some means of expressing the network.
In MLS don’t cares are called “implicit” because they happen naturally.
What computational procedure can we use to hunt for the don’t cares?
What do we know so far about don’t cares?
We are free to treat the x or ‘d’ as a ‘0’ or a ‘1’
What is different in Multi-Level Optimization?
If X, b, y are primary inputs then we cannot say anything yet!
However, If X, b, y are produced by other parts of the network then we might!
X is not a primary input. It is computed inside a previous node.
Now the answer is YES we can say something about impossible patterns. Why?
There are some impossible patterns:
What are the patterns? When can they occur?
What are the
possible
patterns that
can occur?
Recall X=a.b?
These are obvious.
What about remaining
patterns?
We are not actually interested in patterns of a, b, X but interested in the
patterns X, b, Y.
How can we take the a, b, X patterns and determine if X, b, Y can occur?
How can we do this computationally?
By looking at the
Table on the LHS
it is clear that
some X, b,
patterns can
happen while
others DO NOT!
The impossible patterns will change the
contents of the K-Map!!
So now we can further
optimize the
f=Xb +bY + XY in the K-Map
by including the don’t cares.
F = X + bY
F = X + bY
Again we ask if there
impossible values for Y
given b and c.
These don’t cares are called:
Satisfiability Don’t Cares.
Controllability Don’t Cares
MLS: Implicit Don’t Cares …
Any other structures that would give rise to Don’t Care
Conditions?
What happens if the nodes preceding a Boolean network are
not Primary inputs (i.e., another Node?) Previous slides
i.
Satisfiability Don’t Cares.
ii.
Controllability Don’t Cares
What happens if the nodes in front of a Boolean network is not
a Primary output (i.e., another Node?)
Other types of Don’t Cares??
Previously we showed the affect of inputs on F and consequences
of getting Don’t Cares (nodes preceding F)
How about the new Node Z = f.X.d (behind node f)
When does the value of node f affect the primary outputs?
When does Z not care about f?
Note that the table is not in order of Boolean order!
For the set X=0, d=0, does the value of f have any affect?
Where is this leading to??
0--
Z is not affected
by f(X,b,Y) when
X=0, b=-, Y=-
Can we use this
information to further
simplify f??
f=1
So what does
the new
network look
like?
Implicit Don’t Cares
are very useful to
optimize a multi-level
logic network!!
MLS: Satisfiability Don’t Cares …
Different Types and flavors of Don’t Cares:
Observability
Controllability
Satisfiability
What do they tell us?
Are they easy to extract?
Can we compute them automatically?
Representing DC Patterns …
How will we represent don’t care (DC) patterns at a node?
As a Boolean function that makes a 1 when the pattern is impossible
This is often called a Don’t Care Cover
So, each SDC, CDC, ODC is really just another Boolean function
Why do it like this?
Because the math works (!)
But more importantly: we can use all the other computational
Boolean algebra techniques we learnt (eg, BDDs), to solve for, and
manipulate the DC patterns.
This turns out to be hugely important to making this practical.
What is a computational recipe to represent SDCx, SDCy, …?
SDC is a representation of impossible patterns.
SDCx(X,a,b) represents the wire (output of upper function)
RECALL
gate consistency functions
We will use the complement of gate consistency
Anything that makes this function a 1
is an impossible pattern for node X !!
1
1
1
0
SDCs: Summary …
SDCs are associated with every internal wire in the
Boolean Logic Network
SDCs explain impossible patterns of input to, and
output of, each node.
SDCs are easy to compute!!
But SDCs alone are not the Don’t Cares used to simplify
nodes
We use SDCs to build CDCs, which give impossible
patterns at input nodes
MLS: Controllability Don’t Cares …
Controllability Don’t Cares are:
Patterns that cannot happen at inputs of a network.
Computing Controllability Don’t Cares (CDC).
Detailed Example.
Can Compute to
Simplify Boolean
Networks
Why Does This Work?
Step #1: Calculate the SDCs of f which is needed by CDC of f.
What about SDC on primary inputs?
So our computation is becoming simpler since we can ignore the primary inputs.
When you perform the computation you only include variables from
internally computed nodes.
Only arrows coming from bubbles
So if we do that then …
ALSO CALLED CONSENSUS of F wrt Xi
RECALL
CDC = The Universal quantification with respect to `b’ of the following quantity.
Universal Quantification = Co-Factored to b = 1 AND Co-Factored to b = 0.
If you do the Boolean Algebra, what do we get?
If X=0 then Y cannot be 1
If X=0, then both ‘a’ and ‘b’ have to be 0,
But if ‘a’ and ‘b’ are both 0 then Y has to be a ‘0’
That is why XY=01 is impossible.
So we can use XY = 01 as a don’t care, and further simplify F using this pattern.
Accounting for don’t care conditions from the Primary Inputs will
further simplify the Function f.
How …
CDCs: Summary …
CDCs give impossible patterns at input to node F – use
as DCs
Impossible because of the network structure of the nodes feeding node F.
CDCs can be computed mechanically from SDCs on wires input to F
Internal local CDCs: computed just from SDCs on wires into F.
External global CDSs: DC patterns at network input, can be included too.
But CDCs still not all the Don’t Cares available to
simplify nodes
CDCs derived from the structure of nodes “in front of” node F.
We need to look at DCs that derive from nodes “in back of” node F.
These are nodes between the output of F and primary outputs of overall
network.
MLS: Observability Don’t Cares …
We will complete our discussion on don’t cares.
Observability don’t cares are:
patterns that mask the output of a node.
Similar computational techniques will be used.
ODCF = Patterns of (a,b) that
make Z insensitive to F’s Value
Give examples of circuits when an input can be a don’t care??
RECALL
f = x’,
df/dx = fx xor fx’
fx=0, fx’=1
df/dx = 0 xor 1 = 1
What makes this function == 1?
We must make y=1,
if you change x f will change
f = x.y, fx = y and fx’=0,
df/dx = y xor 0 = y
what make this function == 1?
We must make y=0,
Any change on x will change f
f = x+y, fx=1, fx’=y
df/dx = 1 xor y = y’,
f = x xor y, fx= y’, fx’ =y,
df/dx = y xor y’ = 1,
RECALL
We want the Opposite:
want F Insensitive to X
Once you compute the Boolean Difference and complement it, this will
give you the pattern that when applied to Z will not depend on F.
What are the steps or recipe?
F is an XOR Gate
After getting ODCF(a,b)
We can simply replace
XOR with OR gate!!
If F affects even one of the outputs then we cannot use ODC on F
to simplify the expressions.
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